diff --git a/CustomCase.PcbLib b/CustomCase.PcbLib
index 43cad5f..6691f2f 100644
Binary files a/CustomCase.PcbLib and b/CustomCase.PcbLib differ
diff --git a/Diode.SchLib b/Diode.SchLib
index 2eb77cb..fc32cd8 100644
Binary files a/Diode.SchLib and b/Diode.SchLib differ
diff --git a/Pad_Via_Hole.PvLib b/Pad_Via_Hole.PvLib
new file mode 100644
index 0000000..6d30c3e
Binary files /dev/null and b/Pad_Via_Hole.PvLib differ
diff --git a/dk.LibPkg b/dk.LibPkg
index eeff649..59cfae2 100644
--- a/dk.LibPkg
+++ b/dk.LibPkg
@@ -40,6 +40,23 @@ PrefsVaultGUID=
 PrefsRevisionGUID=
 
 [Document1]
+DocumentPath=Pad_Via_Hole.PvLib
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=-1
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=1
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=
+
+[Document2]
 DocumentPath=Capacitor.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -56,7 +73,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=IJLOLAPU
 
-[Document2]
+[Document3]
 DocumentPath=Connector.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -73,7 +90,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=WVYMYTOP
 
-[Document3]
+[Document4]
 DocumentPath=Diode.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -90,7 +107,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=LIXHOGJD
 
-[Document4]
+[Document5]
 DocumentPath=Inductor.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -107,7 +124,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=OBAUABRZ
 
-[Document5]
+[Document6]
 DocumentPath=Oscilator.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -124,7 +141,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=TDRIZRGL
 
-[Document6]
+[Document7]
 DocumentPath=Resistor.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -141,7 +158,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=UFNGSKRK
 
-[Document7]
+[Document8]
 DocumentPath=Transistor.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -158,7 +175,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=VHHIGNKH
 
-[Document8]
+[Document9]
 DocumentPath=ИМС.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -175,7 +192,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=JRDVUTIK
 
-[Document9]
+[Document10]
 DocumentPath=CustomCase.PcbLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -192,7 +209,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=FSCQJSTD
 
-[Document10]
+[Document11]
 DocumentPath=StandardCase.PcbLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -209,7 +226,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=KABGVIMN
 
-[Document11]
+[Document12]
 DocumentPath=Electromechanics.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -226,7 +243,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=LSTRMLLP
 
-[Document12]
+[Document13]
 DocumentPath=Arduino.PcbLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -243,7 +260,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=FUGLOQNO
 
-[Document13]
+[Document14]
 DocumentPath=Modules.SchLib
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -714,26 +731,6 @@ OutputName9=Specctra Design PCB
 OutputDocumentPath9=
 OutputVariantName9=
 OutputDefault9=0
-OutputType10=Orcad v7 Capture Design
-OutputName10=Orcad v7 Capture Design (AutoSCH)
-OutputDocumentPath10=
-OutputVariantName10=
-OutputDefault10=0
-OutputType11=P-CAD ASCII
-OutputName11=P-CAD ASCII (AutoPCB)
-OutputDocumentPath11=
-OutputVariantName11=
-OutputDefault11=0
-OutputType12=P-CAD V16 Schematic Design
-OutputName12=P-CAD V16 Schematic Design (AutoSCH)
-OutputDocumentPath12=
-OutputVariantName12=
-OutputDefault12=0
-OutputType13=SiSoft
-OutputName13=SiSoft (AutoPCB)
-OutputDocumentPath13=
-OutputVariantName13=
-OutputDefault13=0
 
 [OutputGroup10]
 Name=PostProcess Outputs
diff --git a/ИМС.SchLib b/ИМС.SchLib
index b455a92..dbc9023 100644
Binary files a/ИМС.SchLib and b/ИМС.SchLib differ